Embedded System Design Based On Soft- and Hardcore FPGAs
LEON 2 - Altera - RedBoot
This case is an implementation of LEON 2 on the Altera Nios Development board (Cyclone edition) with a patch for RedBoot.
Page contents:
|
The Altera NIOS development board, Cyclone edition.
Main features:
|
More information about this board can be found on the altera website
Leon SPARC
The LEON2 processor is a synthesisable VHDL model of a 32-bit processor compliant with the SPARC V8 architecture. The model is highly configurable, and particularly suitable for system-on-a-chip (SOC) designs. The full source code is available under the GNU LGPL license, allowing free and unlimited use in both research and commercial applications.
The Leon processor was initially developed by ESA, and is now maintained by gaisler research
More information about this processor can be found on gaisler's website, or in an overview we created about softcore processor's.
Implemented hardware functionality
| Implemented board features: | Status: |
| Leon sparc processor (25 MHz - 4kb I/D-cache) | WORKING |
| Debugging Support Unit (via debug-uart) | WORKING |
| 8 MB Flash | WORKING |
| 1MB SRAM | WORKING |
| 16 MB SDR SDRAM | manual access OK |
| 10/100 Ethernet LAN91C111 chip | WORKING |
| CompactFlash (via OCIDEC) | manual register access OK, reading disk ID is OK |
| Serial communication (via Console-Uart) | WORKING |
| Memory map: 0x00000000: FLASH 0x20000000: LAN91C111 registers 0x40000000: SRAM 0x60000000: SDRAM 0xA0000000: OCIDEC registers |
| Extra interrupts: IRQ 12 : LAN91C111 IRQ 13 : OCIDEC |
| Leds: led 0 : error signal, led on when error led 1 : dsu active signal, led on when processor in debug mode led 2 : signals state of dsu enable flipflop |
| Buttons: SW0 : global resetn signal [reset active when button is pushed] SW1 : dsu enable signal [push toggles toggleflipflop, effectively enabling/disabling dsu] SW2 : dsu break enable signal [when released, rising edge, resulting in dsu break condition] |
| Downloads: | (Description) |
| The original leon 2 1.0.22 source code. | |
(for leon 2 1.0.22) |
This is a stripped version of the Cyclone tech library patch created by Mike Forster, you can visit his website here. This patch includes the minimum adjustments needed to add the cyclone tech library to Leon. How to patch the original leon code: - uncompress the Leon tar.gz archive to "../mydirectory/leon-2.1.0.22-xst" - copy the leon2-cycl-tech.diff file into "../mydirectory/" - open a cygwin prompt and browse to "../mydirectory/" - type "patch -p1 --binary -u |
| This Patch is made for Leon 2 version 1.0.22 (with the Cyclone tech library patch applied to it!). The patch adds the "altera nios development board, cyclone edition" to the Leon source code. The comments should be clear enough to explain the code-changes. If not, you can always mail us. How to patch the code: - first create the leon directory as descibed above (leon 2 1.0.22 with cyclone tech patch applied) - copy the leon2_cycl_board.diff file into "../mydirectory/" - type "patch -p1 -u To synthesise the hardware: - in cygwin, go to the "../leon-2.1.0.22-xst" directory - type "make config fpga BOARD=altera_ndb_ce" - after synthesis you can find the synata.sof file in "../leon-2.1.0.22-xst/syn/quartus" |
|
| As alternative: the fully patched leon 2 1.0.22 source code. | |
| A synthesised programming file for the cyclone fpga | |
| The same programming file in raw data format (for use in the flash-chip) |
RedBoot on Leon SPARC
(the same as the RAM image but extended with mkprom bootloader to be able to boot from flash)
User instructions:
Create the RedBoot image (RAM version)
- download the leccs compiler tools v1.1.5.3 [it won't work with v1.2.2] (available at http://www.gaisler.com and http://www.leox.org)
- download the ecos sources (v2.0)
- download the RedBoot patch for Leon SPARC
- apply the patch to the source tree
"$ patch -p1 -u
- go to your working directory
- Create the Leon RedBoot configuration file:
"$ ecosconfig new sparc_leon_cyc redboot"
- Add flash support to your configuration:
"$ ecosconfig add CYGPKG_IO_FLASH"
- Add networking support to your configuration:
"$ ecosconfig add CYGPKG_IO_ETH_DRIVERS"
- OPTIONAL: alter some values like IP address with the ecos configtool:
"$ configtool ecos.ecc"
Set IP address:
"Redboot Rom monitor -> Build Redboot ROM ELF image -> RedBoot Networking -> Default IP address" (USE COMMAS!)
Disable bootp :
"Redboot Rom monitor -> Build Redboot ROM ELF image -> RedBoot Networking -> Default IP address -> Do not try to use BOOTP"
Disable Redboot configuration in flash:
"Redboot Rom monitor -> Build Redboot ROM ELF image -> Allow RedBoot to support FLASH programming-> Keep RedBoot configuration data in flash"
- Create the RedBoot build-tree:
"$ ecosconfig tree"
- Create the RedBoot image. (The image can be found in .../yourworkingdir/install/bin/)
"$ make"
Booting the RAM redboot image
- Connect your board's debug port to your PC containing DSUmon/GRmon
- Connect your board's console port to your PC with minicom/hyperterminal
- Optionally connect the board to your network
- Connect your Altera ByteBlaster or equivalent
- Power up your board
- Load the .sof file into your device with an Altera ByteBlaster or equivalent
- Make connection with your debugging unit using DSUMon/GRMon, available at http://www.gaisler.com
"$ grmon-eval -i -uart /dev/ttyS0" # connect trough your serial port, use S0 for COM1, S1 for COM2
- you should get the following output:
- Connect to the console-UART using minicom/hyperterminal (38400, no parity, no hardware handshake)
- To load the redboot RAM image type "grmon[dsu]> lo RedBoot.elf"
- To run it type "grmon[dsu]> run"
- you should see the following output in minicom/hyperterminal:
Create the RedBoot image (flash version)
The eCos port for Leon currently doesn't support ROM startup mode.
Also there's a small problem with the 8-bit wide flash:
* To read the RedBoot boot-code, the flash is configured in 'virtual 32-bit' mode
(leon memory controller reads 4*8 bit and returns a 32 bit value)
* To recognize the flash-chip/flash-ID, you have to use the 'real 32-bit' mode
(as a special read/write sequence is needed to get those values)
Therefor we can not put the RedBoot 'text' area into flash, as the 'text' area would be corrupted when trying to recognise the flash-chip. That's why we decided not to create a real RedBoot ROM version, but to make use of the LECCS PROM utility which initialises the memory, copies the RedBoot RAM image from flash to RAM and then executes it.
This way we are also able to program the flash.
- Create a RedBoot RAM version, see above
- Use the mkprom tool (included in leccs) to create a ReBoot image you can put into your flash memory:
"$ mkprom -baud 38400 -freq 25 -nocomp -ramsize 1024 -romsize 8192 -romws 3 -v -rmw -sdram 16384 -trfc 200 -trp 120 -refresh 15.5 redboot.elf"
- This will create a prom.out file
Programming the flash RedBoot image into flash
- setup a tftp server and place the prom.out file in the tftpboot directory.
- Boot the RedBoot RAM image, as described above.
- When you get the RedBoot prompt you have to load the RedBoot flash version to RAM:
"RedBoot> load -h tftp-server-ip -m TFTP -b 0x40030000 prom.out"
- Now write the image to flash:
"RedBoot> fis write -b 0x40030000 -l 0x00019999 -f 0x00000000"
Programming the Leon SPARC into flash
- Convert your .sof programming file into a 'Raw Programming Data' .rpd file in Quartus:
* File -> Convert programming files
* Select the 'Raw Programming Data (.rpd)' file type.
* Add your .pof file in the area 'files to convert'
* Click on 'OK'
- setup a tftp server and place the prom.out file in the tftpboot directory.
- Boot the RedBoot RAM image, as described above.
- When you get the RedBoot prompt you have to load the RedBoot flash version to RAM:
"RedBoot> load -h tftp-server-ip -m TFTP -r -b 0x40030000 your_leon_hardware.rpd"
- Now write the image to flash:
"RedBoot> fis write -b 0x40030000 -l 0x0007ffff -f 0x00600000"
When both Leon hardware and RedBoot are put into the flash you should get something like this:
